Bijan Alizadehmalafeh

1. Localizing Multiple Bugs in RTL Designs by Classifying Hit-statements using Neural Networks

Heidari Mahsa, Alizadehmalafeh Bijan (2025)., IEEE TRANSACTIONS ON COMPUTERS, 74(5), 1786-1799.

2. AILIS: effective hardware accelerator for incremental learning with intelligent selection in classification

HosseinpourFardi Nafiseh, Alizadehmalafeh Bijan (2025)., JOURNAL OF SUPERCOMPUTING, 81(4), 1-30.

1. Automatic Correction of Arithmetic Circuits in the Presence of Multiple Bugs by Groebner Basis Modification

Aghapour Sabbagh Negar, Alizadehmalafeh Bijan (2024)., ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 29(5).

2. Concealing Exposed Circuit Features Through a MaxSAT-Based Logic Locking Method

Moradi Shahmiri Mohammad, Alizadehmalafeh Bijan (2024)., IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 71(4), 1-1.

3. Systematic Trojan Detection in Crypto-Systems using the Model Checker

Hosseintalaee Hamed, Jahanian Ali, Alizadehmalafeh Bijan (2024)., JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 33(3).

4. An FPGA-based Hardware Architecture for P+M class PMU using Accuracy-aware O-spline Filter Selection and Modulation Detection

Falahati Ali, Shamirzaei Mahdieh, Alizadehmalafeh Bijan (2024)., IEEE Transactions on Instrumentation and Measurement, 73(-).

1. SQ-PUF: A Resistant PUF-Based Authentication Protocol against Machine-Learning attacks

سجادی هزاوه سید ابوالفضل, Alizadehmalafeh Bijan (2023)., Iranian Journal of Electrical and Computer Engineering, 21(3).

2. HyLock: Hybrid Logic Locking Based on Structural Fuzzing for Resisting Learning-based Attacks

Moradi Mohammad, Alizadehmalafeh Bijan (2023)., The ISC International Journal of Information Security (ISeCure)), 15(3), 1-7.

3. DC-PUF: Machine Learning-Resistant PUF-Based Authentication Protocol Using Dependency Chain for Resource-Constraint IoT Devices

Sajady Abolfazl, Shabani Ahmad, Alizadehmalafeh Bijan (2023)., JOURNAL OF NETWORK AND COMPUTER APPLICATIONS, 217(8).

4. Automatic Correction of RTL Designs using A Lightweight Partial High Level Synthesis

Alizadehmalafeh Bijan, Shiroei Masoud (2023)., INTEGRATION-THE VLSI JOURNAL, 91(7), 173-181.

1. Vulnerability Analysis of Digital Circuits Against Capacitor-based Timing Hardware Trojan

خورمیزی فاطمه, Alizadehmalafeh Bijan (2022)., Security heralded the exchange of information, 20(1), 18-25.

2. Mutual Lightweight PUF-Based Authentication Scheme Using Random Key Management Mechanism for Resource-Constrained IoT Devices

Ashtari Amir, Shabani Ahmad, Alizadehmalafeh Bijan (2022)., ISeCure-ISC International Journal of Information Security, 14(3), 1-8.

3. Mutual Lightweight PUF-Based Authentication Scheme Using Random Key Management Machanism for Resource-Constrained IoT Devices

Ashtari Amir, Shabani Ahmad, Alizadehmalafeh Bijan (2022)., 19th International ISC Conference on Information Security and Cryptology (ISCISC’2022), 31 August-1 September, Rasht, Iran.

4. A Comparative Study of Machine Learning Classifiers for Secure RF-PUF-Based Authentication in Internet of Things

Ashtari amir, Shabani ahmad, Alizadehmalafeh Bijan (2022)., MICROPROCESSORS AND MICROSYSTEMS, 93(1).

5. Hardware Patching Methodology for Neutralizing Timing Hardware Trojans Using Vulnerability Analysis and Time Borrowing Scheme

Khormizi Fatemeh, Shabani Ahmad, Alizadehmalafeh Bijan (2022)., IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 1(1), 1-1.

1. Formal Verification of System Level Power Management Architecture in Modern Processors

Sharafinezhad Seyyed Reza, Alizadehmalafeh Bijan (2021)., journal of iranian association of electical and electronics engineers, 18(4).

2. Vulnerability Analysis of Digital Circuits against Timing Hardware Trojan

خورمیزی فاطمه, Alizadehmalafeh Bijan (2021)., 18th International ISC Conference on Information Security and Cryptology (ISCISC2021), 1-2 September, Isfahan, Iran.

3. SAT-Based Integrated Hardware Trojan Detection and Localization Approach Through Path-Delay Analysis

Sabri Mohammad, Shabani Ahmad, Alizadehmalafeh Bijan (2021)., IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 68(5).

4. Arithmetic Circuit Correction by Adding Optimized Correctors Based on Groebner Basis Computation

Aghapour Sabbagh Negar, Alizadehmalafeh Bijan (2021)., 26th IEEE European Test Symposium, 8-10 March, Belgium.

1. Enhancing Hardware Trojan Detection Sensitivity Using Partition-Based Shuffling Scheme

Shabani Ahmad, Alizadehmalafeh Bijan (2020)., IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 1(1).

2. AIOSC: Analytical Integer Word-length Optimization Based on System Characteristics for Recursive Fixed-Point Linear Time Invariant Systems

Grailoo Tanha Mahdieh, Alizadehmalafeh Bijan (2020)., International Journal of Engineering, 33(7), 1223-1230.

3. ACPA: Exploiting Approximate Computing for High-Level Imprecision Optimization of Fixed-point LTI systems

Grailoo Tanha Mahdieh, Alizadehmalafeh Bijan, Nikoubin Tooraj (2020)., 14th IEEE Dallas Circuits and Systems Conference, 17-18 November, United States Of America (USA).

4. Formal Verification of Non-Functional Strategies of System-Level Power Management Architecture in Modern Processors

Sharafinezhad Seyyed Reza, Alizadehmalafeh Bijan, Nikoubin Tooraj (2020)., 14th IEEE Dallas Circuits and System Conference, 17-18 November, United States Of America (USA).

5. PODEM: A low-cost property-based design modification for detecting Hardware Trojans in resource-constraint IoT devices

Shabani Ahmad, Alizadehmalafeh Bijan (2020)., JOURNAL OF NETWORK AND COMPUTER APPLICATIONS, 167(1).

6. Incremental SAT-based Correction of Gate Level Circuits by Reusing Partially Corrected Circuits

Alizadehmalafeh Bijan, Abadi Yasaman (2020)., IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 67(6).